Biggest changeIn assembly and bumping areas, our research and development efforts were directed to: • Au height reduction, as part of cost reduction drive, 10um bump height COF package and 8um bump height COG package was released for production; • Wafer-level chip scale packaging and 3P2M Cu RDL processes; • Fine-pitch Cu RDL process for WLCSP and RDL products; • Flip-chip CSP for DRAM and mixed-signal application; • 3P/3M Cu pillar bumping for 300mm wafers high pin count products; • Fine pitch copper pillar process for micro bump structure; • Thicker Cu/Ni/Au RDL and 100im tall Cu pillar for PMIC application; • Developing fine pitch Cu RDL line width and space with 4um/4um for advanced re-distribution layer device design requirement; • Shrink ball size with ball mount technology and combine thinner wafer grind thickness to achieve thin WLCSP requirement; • Dual/Multi-chip assembly and module of flash products for SSD and eMMC applications; • Hybrid package by integration of wire binding & flip-chip process with passive components to offer total solution for UFS device; • DBG/SDBG implementation to enhance the capability of ultra-thin wafer lapping and dicing capabilities for stacked-die chip scale package; • Advanced thin core/core-free, flex substrate solutions for thin and flip chip packages; • 2-metal layers COF assembly and COF SMT capabilities; 34 • Qualified thermally enhanced COF and MCB COF and released for manufacturing; • Double-sided Heat Sink/ High conductivity material development is applied in thermal packaging services for high-resolution panels; • Source & Gate ICs integrated technology development is used in product applications with narrow border panels; • Develop new 2P2M RDL structure to use pure Cu RDL for fine pitch complex circuit and Improved Cu RDL undercut instead of Cu-Ni-Au composite structure; • Develop Ultra Fine Pitch (UFP) COF assembly and testing technology; • Implement new thermal conductive resin with higher conductivity for COF package; • Enhance Pb free ball level capability (temperature cycle > 1000 cycles); and • High Frequency & Low loss Product Substrate design for FCCSP.
Biggest changeIn assembly and bumping areas, our research and development efforts were directed to: • Au height reduction, as part of cost reduction drive, 10um bump height COF package and 8um bump height COG package was released for production; • Wafer-level chip scale packaging and 3P2M Cu RDL processes; 33 • Fine-pitch Cu RDL process for WLCSP and RDL products; • Flip-chip CSP for DRAM and mixed-signal application; • 3P/3M Cu pillar bumping for 300mm wafers high pin count products; • Fine pitch copper pillar process for micro bump structure; • Thicker Cu/Ni/Au RDL and 100im tall Cu pillar for PMIC application; • Developing fine pitch Cu RDL line width and space with 4um/4um for advanced re-distribution layer device design requirement; • Shrink ball size with ball mount technology and combine thinner wafer grind thickness to achieve thin WLCSP requirement; • Dual/Multi-chip assembly and module of flash products for SSD and eMMC applications; • Hybrid package by integration of wire binding & flip-chip process with passive components to offer total solution for UFS device; • DBG/SDBG implementation to enhance the capability of ultra-thin wafer lapping and dicing capabilities for stacked-die chip scale package; • Advanced thin core/core-free, flex substrate solutions for thin and flip chip packages; • 2-metal layers COF assembly and COF SMT capabilities; • Qualified thermally enhanced COF and MCB COF and released for manufacturing; • Double-sided Heat Sink/ High conductivity material development is applied in thermal packaging services for high-resolution panels; • Source & Gate ICs integrated technology development is used in product applications with narrow border panels; • Develop new 2P2M RDL structure to use pure Cu RDL for fine pitch complex circuit and Improved Cu RDL undercut instead of Cu-Ni-Au composite structure; • Develop Ultra Fine Pitch (UFP) COF assembly and testing technology; • Implement new thermal conductive resin with higher conductivity for COF package; • Enhance Pb free ball level capability (temperature cycle > 1000 cycles); and • High Frequency & Low loss Product Substrate design for FCCSP. • Develop 2P2M with thick Cu RDL and taller Cu Pillar bump height technology for power management chip product. • Develop 12 inch stand-alone thinner technology for WLCSP. • Develop extremely narrow IC width ( • Technical services for COF packaging and applying for non-display product. • DDR5 DRAM assembly technology development. • Thermal enhanced Flip-chip BGA with Heat sink assembly technology development . 34 For new product and product enhancement work in 2017, our work concentrates on three key development programs: 3D WLCSP, biometric sensor package solutions, and flip chip technology.
As the costs of semiconductor manufacturing facilities increase, semiconductor companies are expected to further outsource their wafer fabrication, assembly and testing requirements to focus their resources on core competencies, such as semiconductor design and marketing. Time-to-Market Pressure.
As the costs of semiconductor manufacturing facilities increase, semiconductor companies are expected to further outsource wafer fabrication, assembly and testing requirements to focus their resources on core competencies, such as semiconductor design and marketing. Time-to-Market Pressure.
Die Saw Wafers are cut into individual dies, or chips, in preparation for the die-attach process. Die Attach Each individual die is attached to the leadframe or organic substrate. Wire Bonding Using gold or silver wires, to connect the I/O pads on the die to the inner lead of leadframe or substrate.
Die Saw Wafers are cut into individual dies, or chips, in preparation for the die-attach process. Die Attach Each individual die is attached on the leadframe or organic substrate. Wire Bonding Using gold or silver wires, to connect the I/O pads on the die to the inner lead of leadframe or substrate.
Inspection and Packing Each individual die with tape is visually or auto inspected for defects. The dies are packed within a reel into an aluminum bag after completion of the inspection process. 30 Chip-on-Glass (COG) Technology COG technology is an electronic assembly technology that is used in assembling display driver semiconductors including TV/monitor, mobile and wearable products.
Inspection and Packing Each individual die with tape is visually or auto inspected for defects. The dies are packed within a reel into an aluminum bag after completion of the inspection process. Chip-on-Glass (COG) Technology COG technology is an electronic assembly technology that is used in assembling display driver semiconductors including TV/monitor, mobile and wearable products.
This is because of its structural design, including an adhesive-free two-layer tape that is highly flexible, bending strength and its capacity to receive finer patterning pitch. COF package has been using for large-size and high-resolution panel display, especially on TFT-LCD and OLED TV set and NB as well.
This is because of its structural design, including an adhesive-free two-layer tape that is highly flexible, bending strength and its capacity to receive finer patterning pitch. 29 COF package has been using for large-size and high-resolution panel display, especially on TFT-LCD and OLED TV set and NB as well.
Key Information—Risk Factors—Risks Relating to Our Business—Disputes over intellectual property rights could be costly, deprive us of technologies necessary for us to stay competitive, render us unable to provide some of our services and reduce our opportunities to generate revenue”. Government Regulations As discussed above under “—Intellectual Property”, governmental regulation of our intellectual property may materially affect our business.
Key Information—Risk Factors—Risks Relating to Our Business—Disputes over intellectual property rights could be costly, deprive us of technologies necessary for us to stay competitive, render us unable to provide some of our services and reduce our opportunities to generate revenue”. 37 Government Regulations As discussed above under “—Intellectual Property”, governmental regulation of our intellectual property may materially affect our business.
Many of these IDMs are continuously significantly reducing their investments in new semiconductor assembly and testing facilities. 20 The availability of technologically advanced independent semiconductor manufacturing services has also enabled the growth of “fabless” semiconductor companies that focus exclusively on semiconductor design and marketing and outsource their fabrication, assembly and testing requirements to independent companies.
Many of these IDMs are continuously significantly reducing their investments in new semiconductor assembly and testing facilities. The availability of technologically advanced independent semiconductor manufacturing services has also enabled the growth of “fabless” semiconductor companies that focus exclusively on semiconductor design and marketing and outsource fabrication, assembly and testing requirements to independent companies.
For example, with the exception of aluminum bags and inner and outer boxes, which we acquire from local sources, the raw materials used in our COF process and for modules are obtained from a limited number of Japanese suppliers. Competition The independent assembly and testing markets are very competitive.
For example, with the exception of aluminum bags and inner and outer boxes, which we acquire from local sources, the raw materials used in our COF process and for modules are obtained from a limited number of Japanese suppliers. 36 Competition The independent assembly and testing markets are very competitive.
Long-Term Customer Partnerships ChipMOS promises that products and services delivered to customers can meet their needs, are competitive, and are served on a timely basis. Upholding the principle of customer service, we provide comprehensive products and services from a customer oriented perspective with the aim of becoming their trusted, long-term partners.
Long-Term Customer Partnerships ChipMOS promises that products and services delivered to customers can meet their needs, are competitive, and are served on a timely basis. Upholding the principle of customer service, we provide comprehensive products and services from a customer oriented perspective with the aim of becoming customers’ trusted, long-term partners.
Tape and reel pack involves transferring semiconductors from a tray or tube onto an anti-static embossed tape and rolling the tape onto a reel for shipment to customers. Assembly Our assembly services generally involve the following steps: Wafer Lapping The wafers are ground to their required thickness.
Tape and reel pack involves transferring semiconductors from a tray or tube onto an anti-static embossed tape and rolling the tape onto a reel for shipment to customers. 23 Assembly Our assembly services generally involve the following steps: Wafer Lapping The wafers are ground to their required thickness.
Package Connections Description End-User Applications WLCSP 4-96 Very small package size (identical to die size), suitable for the low pin count and require the small package size application Memory, ASICs, PMIC, MEMS devices, controllers, for mobile phones, tablets, ultra book computers and wearable products 28 FC CSP FC Chip Scale Package (FC CSP) construction utilizes the flip chip bumping (with solder bump or Cu pillar bump) interconnection technology to replace the standard wire-bond interconnect.
Package Connections Description End-User Applications WLCSP 4-219 Very small package size (identical to die size), suitable for the low pin count and require the small package size application Memory, ASICs, PMIC, MEMS devices, controllers, for mobile phones, tablets, ultra book computers and wearable products FC CSP 28 FC Chip Scale Package (FC CSP) construction utilizes the flip chip bumping (with solder bump or Cu pillar bump) interconnection technology to replace the standard wire-bond interconnect.
As part of our emphasis on customer service, these teams: • actively participate in the design process at the customers’ facilities; 33 • resolve customer assembly and testing issues; and • promote timely and individualized resolutions to customers’ issues.
As part of our emphasis on customer service, these teams: • actively participate in the design process at the customers’ facilities; • resolve customer assembly and testing issues; and • promote timely and individualized resolutions to customers’ issues.
In addition, auto inspection machines and manual work are used in the COG process, which is more labor-intensive than the COF processes. Item 4A. Unresolved Staff Comments Not applicable.
In addition, auto inspection machines and manual work are used in the COG process, which is more labor-intensive than the COF processes. 41 Item 4A. Unresolved Staff Comments Not applicable.
Through reducing consumption and carbon emissions, we hope to reduce the impacts on the environment. At the same time, we also continue to educate employees to enhance their awareness for environmental protection. These efforts have also been extended to our suppliers and stakeholders as we hope to work collectively to become a low-carbon, energy-saving, and green enterprise.
Through reducing consumption and carbon emissions, we hope to reduce the impacts on the environment. At the same time, we also continue to educate employees to enhance their awareness of environmental protection. These efforts have also been extended to our suppliers and stakeholders as we hope to work collectively to become a low-carbon, energy-saving, and green enterprise.
Small package suitable to apply on hand-held 3C electronic products Electronic Compass, audio converter, nor flash product, power control, sensor magnetometer, MEMS magnetometer, CMOS Image Sensor controller, Laser diode driver, power manager IC (PMIC) Wafer Level CSP Wafer-level CSP (WLCSP) is the technology of packaging an integrated circuit at wafer level.
Small package suitable to apply on hand-held 3C electronic products Electronic Compass, audio converter, nor flash product, power control, sensor magnetometer, CMOS Image Sensor controller, Laser diode driver, power manager IC (PMIC) 27 Wafer Level CSP Wafer-level CSP (WLCSP) is the technology of packaging an integrated circuit at wafer level.
ChipMOS is committed to building solar power generation system up to 10% of the contracted power generation in 2024, planning various energy saving goals and achieve a company-wide energy saving rate more than 1%, and implementing products’ Carbon and Water Footprint and Material Flow Cost Accounting and more.
ChipMOS is committed to building solar power generation system up to 10% of the contracted power generation in 2025, planning various energy saving goals and achieve a company-wide energy saving rate more than 1%, and implementing products’ Carbon and Water Footprint and Material Flow Cost Accounting and more.
In recent years, there has been an observable trend with which the average inner lead pitch of COF package went down to 23um with more than 80% of market demand. High thermal dissipation packaging technology is available for mass production.
In recent years, there has been an observable trend with which the average inner lead pitch of COF package went down to 23um with more than 90% of market demand. High thermal dissipation packaging technology is available for mass production.
We intend to continue our focus on developing and providing advanced assembly and testing services for potential growth segments of the semiconductor industry, such as memory, logic/mixed-signal, MEMS, LCD, OLED, automotive panel and other display panel driver semiconductors and bumping services.
We intend to continue our focus on developing and providing advanced assembly and testing services for potential growth segments of the semiconductor industry, such as memory, logic/mixed-signal, OLED, automotive panel and other display panel driver semiconductors and bumping services.
Our facilities at Hsinchu Science Park, Chupei, Hukou, Hsinchu Industrial Park and Southern Taiwan Science Park have won numerous awards including “Green Factory Label” from 2013 to 2023, “Enterprises Environmental Protection Gold Grade Award” in 2018 and 2019, “Occupational Safety and Health Excellent Award” in 2016, 2017, 2021, 2022 and 2023, “Green Building Label” in 2014 and 2017 up to now.
Our facilities at Hsinchu Science Park, Chupei, Hukou, Hsinchu Industrial Park and Southern Taiwan Science Park have won numerous awards including “Green Factory Label” from 2013 to 2024, “Enterprises Environmental Protection Gold Grade Award” in 2018 and 2019, “Occupational Safety and Health Excellent Award” in 2016, 2017, 2021 to 2024, “Green Building Label” in 2014 and 2017 up to now.
As the number of leads surrounding a traditional leadframe-based package increases, the leads must be placed closer together to reduce the size of the package. The close proximity of one lead to another can create electrical shorting problems and requires the development of increasingly sophisticated and expensive techniques to accommodate the high number of leads on the circuit boards.
As the number of leads surrounding a traditional leadframe-based package increases, the leads must be placed closer together to reduce the size of the package. The close proximity of one lead to another can create electrical shorting problems and requires the development of continuously more sophisticated and expensive techniques to accommodate the high number of leads on the circuit boards.
In addition, we regularly collect data from different segments of the semiconductor industry and, when possible, we work closely with our customers to design and develop assembly and testing services for their new products. Sale will cowork with internal technology expert to work closely with our customers as project kick off.
In addition, we regularly collect data from different segments of the semiconductor industry and, when possible, we work closely with our customers to design and develop assembly and testing services for new products. Sale will cooperate with internal technology expert to work closely with our customers as project kick off.
Operating and Financial Review and Prospects—Taxation” for certain information regarding the effect of ROC tax regulations on our operations. 40 Facilities We provide testing services through our facilities in Taiwan at following locations: Chupei, the Hsinchu Industrial Park, the Hsinchu Science Park, and the Southern Taiwan Science Park.
Operating and Financial Review and Prospects—Taxation” for certain information regarding the effect of ROC tax regulations on our operations. Facilities We provide testing services through our facilities in Taiwan at following locations: Chupei, the Hsinchu Industrial Park, the Hsinchu Science Park, and the Southern Taiwan Science Park. We provide assembly services through our facility at the Southern Taiwan Science Park.
The failure to protect our property rights would deprive us of our ability to stay competitive in the semiconductor industry. Our intellectual property rights are protected by the relevant patent and intellectual property agencies of the European Community, the United Kingdom, the United States, Mainland China, Singapore, Hong Kong, Korea, Japan and Taiwan.
The failure to protect our property rights would deprive us of our ability to stay competitive in the semiconductor industry. Our intellectual property rights are protected by the relevant patent and intellectual property agencies of the European Community, the United Kingdom, the United States, Mainland China, Korea, Japan and Taiwan.
As time-to-market and cost increasingly become sources of competitive advantage for our customers, they increasingly value our ability to provide them with comprehensive back-end services. 22 We are able to offer vertically integrated services for a broad range of products, including memory, logic/mixed-signal and LCD, OLED, automotive panel and other display panel driver semiconductors.
Time-to-market and cost are sources of competitive advantage for our customers. As a result, our customers increasingly value our ability to provide them with comprehensive back-end services. We are able to offer vertically integrated services for a broad range of products, including memory, logic/mixed-signal and LCD, OLED, automotive panel and other display panel driver semiconductors.
Potential growth in the DRAM and NAND Flash market is expected to be driven by continued growth in both the commodity and niche DRAM market, as well as growth opportunities in mobile DRAM as memory requirements significantly increase for mobile applications and storage requirement for data center application.
The memory market is dominated by two segments-DRAM and flash memory. Potential growth in the DRAM and NAND Flash market is expected to be driven by continued growth in both the commodity and niche DRAM market, as well as growth opportunities in mobile DRAM as memory requirements significantly increase for mobile applications and storage requirement for data center application.
Corporate Governance ChipMOS has established the corporate governance structure and formulated good governance system, abides by legal regulations and ethical management to ensure the Company’s robust operations and growth in line with its Articles of Incorporation, Corporate Governance Best Practice Principles and applicable laws and regulations.
Corporate Governance ChipMOS has established the corporate governance structure and formulated good governance system, abides by legal regulations and ethical management to ensure the Company’s robust operations and growth in line with its Articles of Incorporation, “Corporate Governance Best Practice Principles” and applicable laws and regulations.
And dual IC with high thermal dissipation COF packaging technology is ready for 8K TV market. 18um/16um inner lead pitch 2-metal layer COF package is in development for coming AR/VR gear requirement. And we can test display driver semiconductors with frequency up to 6.5Gbps to fulfill high speed data rate requirement.
And dual IC with high thermal dissipation COF packaging technology is ready for 8K TV market. 18um/16um inner lead pitch 2-metal layer COF package is ready for production of coming AR/VR gear requirement. And we can test display driver semiconductors with frequency up to 6.5Gbps to fulfill high speed data rate requirement.
More semiconductor chips and display panel are consumed with the trend of popularization of automotive panels and Electric Vehicle (EV) could benefit our margin and increase our earnings. Semiconductor Industry Trends Growth in the semiconductor industry is largely driven by end-user demand for consumer electronics, communications equipment and computers, for which semiconductors are critical components.
More semiconductor chips and display panel are consumed with the trend of popularization of automotive panels and Electric Vehicle (EV) could benefit our margin and increase our earnings. Semiconductor Industry Trends Growth in the semiconductor industry is largely driven by end-user demand for consumer electronics, communications equipment and computers. Semiconductors are critical components of these products and applications.
In recent years, there has been a trend in the industry to outsource various segments of stages in the manufacturing process to reduce the high fixed costs resulting from the increasingly complex manufacturing process. Virtually every significant stage of the manufacturing process can be outsourced.
In recent years, there has been a trend in the industry to outsource various segments of stages in the manufacturing process to reduce the high fixed costs resulting from the continuously more complex manufacturing process. Virtually every significant stage of the manufacturing process can be outsourced.
Year ended December 31, 2021 2022 2023 Taiwan 79% 79% 81% Japan 6% 9% 6% PRC 7% 8% 8% Singapore 6% 2% 3% Others 2% 2% 2% Total 100% 100% 100% Qualification and Correlation by Customers Our customers generally require that our facilities undergo a stringent “qualification” process during which the customer evaluates our operations, production processes and product reliability, including engineering, delivery control and testing capabilities.
Year ended December 31, 2022 2023 2024 Taiwan 79% 81% 80% Japan 9% 6% 6% PRC 8% 8% 7% Singapore 2% 3% 4% Others 2% 2% 3% Total 100% 100% 100% 32 Qualification and Correlation by Customers Our customers generally require that our facilities undergo a stringent “qualification” process during which the customer evaluates our operations, production processes and product reliability, including engineering, delivery control and testing capabilities.
Wafer Level Chip Scale Package (WLCSP) 6-125 WLCSP package size is almost the same as die size. Simple assembly process flow, low cost.
Wafer Level Chip Scale Package (WLCSP) 4-125 WLCSP package size is almost the same as die size. Simple assembly process flow, low cost.
Package Connections Description End-User Applications FC CSP 8-1288 Superior electrical performance, smaller form factor Power devices, RF, High speed Logic devices, wireless, memory or portable applications 29 Display Driver Semiconductors and Gold MCB Bumping We also offer assembly and testing services for display driver semiconductors. We employ COF and COG technologies for testing and assembling display driver semiconductors.
Package Connections Description End-User Applications FC CSP 24-484 Superior electrical performance, smaller form factor Power devices, RF, High speed Logic devices, wireless, memory or portable applications Display Driver Semiconductors and Gold MCB Bumping We also offer assembly and testing services for display driver semiconductors. We employ COF and COG technologies for testing and assembling display driver semiconductors.
Environmental Sustainability Various plans are conducted based on the two major aspects, “environmental friendliness” and “community feedback”. For the implementation strategy, we start from the Company internally and work with the community. Other than taking care of the surrounding 39 environment, we also use our social influence to work with the employees to love the Earth with diverse approaches.
Environmental Sustainability Various plans are conducted based on the two major aspects, “environmental friendliness” and “community feedback”. For the implementation strategy, we start from the Company internally and work with the community. Other than taking care of the surrounding environment, we also work together with our employees to love the Earth with diverse approaches.
The Company listed and commenced trading on the main board of TWSE on April 11, 2014. According to the merger agreement, entered between the Company and ChipMOS Bermuda dated January 21, 2016 (the “Merger Agreement”), ChipMOS Bermuda merged with and into the Company, with the Company being the surviving company after the Merger.
The Company listed and commenced trading on the main board of TWSE on April 11, 2014. According to the merger agreement, entered between the Company and ChipMOS TECHNOLOGIES (Bermuda) LTD. (“ChipMOS Bermuda”) dated January 21, 2016 (the “Merger Agreement”), ChipMOS Bermuda merged with and into the Company, with the Company being the surviving company after the Merger.
Benefits of ball grid array assembly over leadframe-based assembly include: • smaller size; • smaller footprint on a printed circuit board; • better electrical signal integrity; and • easier attachment to a printed circuit board. 26 The following diagram presents the basic component parts of a fine-pitch BGA package: The following table presents the ball-count, description and end-user applications of organic substrate-based packages we currently assemble: Package Connections Description End-User Applications Mini BGA 24-400 Low-cost and space-saving assembly designed for low input/output count, suitable for semiconductors that require a smaller package size than standard BGA Memory, analog, flash memory, ASICs, radio frequency devices, personal digital assistants, cellular handsets, communication products, notebooks, wireless systems Fine-Pitch BGA 54-126 Our patented design for DRAM products that require high performance and chip scale package (CSP) Notebooks, cellular handsets, global positioning systems, personal digital assistants, wireless systems Very Thin Fine-Pitch BGA 48-176 Similar structure of Mini BGA package with thinner and finer ball pitch that is designed for use in a wide variety of applications requiring small size, high reliability and low unit cost Handheld devices, notebooks, disk drives, wireless and mobile communication products Land Grid Array (LGA) 8-52 Thinner and lighter assembly designed essential to standard BGA without solder balls, suitable for applications that require high electrical performance Disk drives, memory controllers, wireless, mobile communication products Multi-Chip BGA 48-153 Designed for assembly of two or more memory chips (to increase memory density) or combinations of memory and logic chips in one BGA package Notebooks, digital cameras, personal digital assistants, global positioning systems, sub-notebooks, board processors, wireless systems Stacked-Chip BGA 24-345 Designed for assembly of two or more memory chips or logic and memory chips in one CSP, reducing the space required for memory chips Cellular handsets, digital cameras, personal digital assistants, wireless systems, notebooks, global positioning systems FC Chip-scale Package (FC CSP) 16-872 Better IC protection and solder joint reliability compared to direct chip attach (DCA) and chip on board (COB) Memory, logic, microprocessor, application processor (AP), baseband (BB), solid state device, radio frequency (RF) Multi-Chip Hybrid Package (FC+WB) 153-345 Designed for assembly of two or more memory chips or combinations of memory and logic chips in one BGA package with both of flip chip and wire bonding Embedded Multi Media Card (eMMC), Universal Flash Storage (UFS), and BGA SSD 27 Package Connections Description End-User Applications Chip on Wafer (CoW) 5-30 Integrated two different functional chips to a closer form into a compact package.
The following diagram presents the basic component parts of a fine-pitch BGA package: 26 The following table presents the ball-count, description and end-user applications of organic substrate-based packages we currently assemble: Package Connections Description End-User Applications Mini BGA 24-400 Low-cost and space-saving assembly designed for low input/output count, suitable for semiconductors that require a smaller package size than standard BGA Memory, analog, flash memory, ASICs, radio frequency devices, personal digital assistants, cellular handsets, communication products, notebooks, wireless systems Fine-Pitch BGA 54-126 Our patented design for DRAM products that require high performance and chip scale package (CSP) Notebooks, cellular handsets, global positioning systems, personal digital assistants, wireless systems Very Thin Fine-Pitch BGA 24-176 Similar structure of Mini BGA package with thinner and finer ball pitch that is designed for use in a wide variety of applications requiring small size, high reliability and low unit cost Handheld devices, notebooks, disk drives, wireless and mobile communication products Land Grid Array (LGA) 11-149 Thinner and lighter assembly designed essential to standard BGA without solder balls, suitable for applications that require high electrical performance Disk drives, memory controllers, wireless, mobile communication products Multi-Chip BGA 24-308 Designed for assembly of two or more memory chips (to increase memory density) or combinations of memory and logic chips in one BGA package Notebooks, digital cameras, personal digital assistants, global positioning systems, sub-notebooks, board processors, wireless systems Stacked-Chip BGA 24-345 Designed for assembly of two or more memory chips or logic and memory chips in one CSP, reducing the space required for memory chips Cellular handsets, digital cameras, personal digital assistants, wireless systems, notebooks, global positioning systems FC Chip-scale Package (FC CSP) 16-872 Better IC protection and solder joint reliability compared to direct chip attach (DCA) and chip on board (COB) Memory, logic, microprocessor, application processor (AP), baseband (BB), solid state device, radio frequency (RF) Multi-Chip Hybrid Package (FC+WB) 153-345 Designed for assembly of two or more memory chips or combinations of memory and logic chips in one BGA package with both of flip chip and wire bonding Universal Flash Storage (UFS), and BGA SSD Chip on Wafer (CoW) 5-30 Integrated two different functional chips to a closer form into a compact package.
The following table presents our principal leadframe-based packages, including the number of leads in each package, commonly known as lead-count, a description of each package and the end-user applications of each package. 25 Package Lead- count Description End-User Applications Thin Small Outline Package I (TSOP I) 48-56 Designed for high volume production of low lead-count memory devices, including flash memory, SRAM and MROM Notebooks, personal computers, still and video cameras and standard connections for peripherals for computers Thin Small Outline Package II (TSOP II) 44-86 Designed for memory devices, including flash memory, SRAM, SDRAM and DDR DRAM Disk drives, recordable optical disk drives, audio and video products, consumer electronics, communication products Quad Flat No Lead (QFN) 8-132 Thermal enhanced quad flat no lead package providing small footprint (chip scale), light weight with good thermal and electrical performance Wireless communication products, notebooks, PDAs, consumer electronics Low-Profile Quad Flat Package (LQFP) 48 Low-profile and light weight package designed for ASICs, digital signal processors, microprocessors/ controllers, graphics processors, gate arrays, SSRAM, SDRAM, personal computer chipsets and mixed-signal devices Wireless communication products, notebooks, digital cameras, cordless/radio frequency devices Small Outline Package (SOP) 8 Designed for low lead-count memory and logic semiconductors, including SRAM and micro-controller units Personal computers, consumer electronics, audio and video products, communication products Multi-Chip Package (TSOP) 44-86 Our patented design for memory devices, including flash memory, SRAM, DRAM, SDRAM and DDR DRAM Notebooks, personal computers, disk drives, audio and video products, consumer products, communication products Flip Chip Quad Flat No Lead (FCQFN) 6-35 Thermal enhanced quad flat no lead package providing small footprint (chip scale), light weight with good thermal and electrical performance Flip chip process is designed for better electrical performance compared to wire bonding process Wireless communication products, notebooks, PDAs, consumer electronics Organic Substrate-based Packages.
Package Lead- count Description End-User Applications Thin Small Outline Package I (TSOP I) 48-56 Designed for high volume production of low lead-count memory devices, including flash memory, SRAM and MROM Notebooks, personal computers, still and video cameras and standard connections for peripherals for computers Thin Small Outline Package II (TSOP II) 44-86 Designed for memory devices, including flash memory, SRAM, SDRAM and DDR DRAM Disk drives, recordable optical disk drives, audio and video products, consumer electronics, communication products Quad Flat No Lead (QFN) 8-132 Thermal enhanced quad flat no lead package providing small footprint (chip scale), light weight with good thermal and electrical performance Wireless communication products, notebooks, audio and video products and consumer electronics Low-Profile Quad Flat Package (LQFP) 48 Low-profile and light weight package designed for ASICs, digital signal processors, microprocessors/ controllers, graphics processors, gate arrays, SSRAM, SDRAM, personal computer chipsets and mixed-signal devices Wireless communication products, notebooks, digital cameras, cordless/radio frequency devices Small Outline Package (SOP) 8 Designed for low lead-count memory and logic semiconductors, including SRAM and micro-controller units Personal computers, consumer electronics, audio and video products, communication products Multi-Chip Package (TSOP) 44-86 Our patented design for memory devices, including flash memory, SRAM, DRAM, SDRAM and DDR DRAM Notebooks, personal computers, disk drives, audio and video products, consumer products, communication products 25 Package Lead- count Description End-User Applications Flip Chip Quad Flat No Lead (FCQFN) 6-35 Thermal enhanced quad flat no lead package providing small footprint (chip scale), light weight with good thermal and electrical performance Flip chip process is designed for better electrical performance compared to wire bonding process Wireless communication products, notebooks, audio/video products and consumer electronics Organic Substrate-based Packages.
Research and Development To maintain our competitive edge for continued business growth, we continue our focus of our investment in new technology research and development. In 2021, 2022 and 2023, we spent approximately NT$1,139 million, or 4.2%, NT$1,159 million, or 4.9% and NT$1,093 million (US$36 million), or 5.1%, respectively, of our revenue on research and development.
Research and Development To maintain our competitive edge for continued business growth, we continue our focus of our investment in new technology research and development. In 2022, 2023 and 2024, we spent approximately NT$1,159 million, or 4.9%, NT$1,093 million, or 5.1% and NT$1,163 million (US$36 million), or 5.1%, respectively, of our revenue on research and development.
Upon the acquisition of new test equipment, we install, configure, calibrate and perform burn-in diagnostic tests on the equipment. We also establish parameters for the test equipment based on anticipated requirements of existing and potential customers and considerations relating to market trends. As of February 29, 2024, we operated 631 testers for testing memory and logic/mixed-signal semiconductors.
Upon the acquisition of new test equipment, we install, configure, calibrate and perform burn-in diagnostic tests on the equipment. We also establish parameters for the test equipment based on anticipated requirements of existing and potential customers and considerations relating to market trends. As of February 28, 2025, we operated 646 testers for testing memory and logic/mixed-signal semiconductors.
As of February 29, 2024, we operated 948 wire bonders. In addition to wire bonders, we maintain a variety of other types of assembly equipment, such as wafer grinders, wafer mounters, wafer saws, stealth dicing, die separator, die bonders, automated molding machines, laser markers, solder platers, pad printers, dejunkers, trimmers, formers, substrate saws and lead scanners.
As of February 28, 2025, we operated 790 wire bonders. In addition to wire bonders, we maintain a variety of other types of assembly equipment, such as wafer grinders, wafer mounters, wafer saws, stealth dicing, die separator, die bonders, automated molding machines, laser markers, solder platers, pad printers, dejunkers, trimmers, formers, substrate saws and lead scanners.
In addition, we offer gold bumping and metal composite bump services to our customers. Note: Copper pillar service only for Max size: 9.8mmx8.2mm & pillar Account: 3401 Chip-on-Film (COF) Technology COF technology provides several additional advantages. For example, COF is able to meet the size, weight and higher resolution requirements in electronic products, such as display panels.
In addition, we offer gold bumping and metal composite bump services to our customers. Note: Copper pillar service only for Max size: 9.9mmx9.4mm & pillar Account: 3,410 Chip-on-Film (COF) Technology COF technology provides several additional advantages. For example, COF is able to meet the size, weight and higher resolution requirements in electronic products, such as display panels.
We are committed to delivering semiconductors that meet or exceed our customers’ specifications on time and at a competitive cost. We maintain quality control staff at each of our facilities. 35 As of February 29, 2024, we employed 51 personnel for our quality control activities.
We are committed to delivering semiconductors that meet or exceed our customers’ specifications on time and at a competitive cost. We maintain quality control staff at each of our facilities. As of February 28, 2025, we employed 51 personnel for our quality control activities.
For automotive application, low temperature COF package testing technology is developed. The following diagram presents the basic components of 1-metal layer COF and 2-metal layer COF: The COF process involves the following steps: Chip Probing Screen out the defect chips which fail to meet the device spec.
Minus temperature COF package testing technology is in production for automotive application requirement. The following diagram presents the basic components of 1-metal layer COF and 2-metal layer COF: The COF process involves the following steps: Chip Probing Screen out the defect chips which fail to meet the device spec.
In 2023, we spent approximately 5.1% of our revenue on research and development. We will continue to invest our resources to recruit and retain experienced research and development personnel. As of February 29, 2024, our research and development team comprised 698 employees. Build on Our Strong Presence in Taiwan and Strong Industrial Position Outside Taiwan.
In 2024, we spent approximately 5.1% of our revenue on research and development. We will continue to invest our resources to recruit and retain experienced research and development personnel. As of February 28, 2025, our research and development team comprised 680 employees. Build on Our Strong Presence in Taiwan and Strong Industrial Position Outside Taiwan.
As a result of our ongoing focus on quality, in 2023, we achieved monthly assembly yields of an average of 99.93% for our memory and logic/mixed-signal assembly packages, 99.98% for our COF packages, 99.96% for our COG packages and 99.96% for our bumping products (including gold bump, RDL and WLCSP).
As a result of our ongoing focus on quality, in 2024, we achieved monthly assembly yields of an average of 99.92% for our memory and logic/mixed-signal assembly packages, 99.99% for our COF packages, 99.97% for our COG packages and 99.96% for our bumping products (including gold bump, RDL and WLCSP).
As of February 29, 2024, our sales and marketing efforts were primarily carried out by teams of sales professionals, application engineers and technicians, totaling 32 staff members. Each of these teams focuses on specific customers and/or geographic regions.
As of February 28, 2025, our sales and marketing efforts were primarily carried out by teams of sales professionals, application engineers and technicians, totaling 31 staff members. Each of these teams focuses on specific customers and/or geographic regions.
Operating and Financial Review and Prospects—Recent Acquisition”. Our Principal Consolidated Subsidiaries Below is a description of our principal consolidated subsidiaries: ChipMOS TECHNOLOGIES (BVI) LTD., or formerly known as MODERN MIND TECHNOLOGY LIMITED ChipMOS BVI was incorporated in the British Virgin Islands in January 2002. ChipMOS SEMICONDUCTORS (Shanghai) LTD.
For additional information on the transaction, see “Item 5. Operating and Financial Review and Prospects—Recent Acquisition”. Our Principal Consolidated Subsidiaries Below is a description of our principal consolidated subsidiaries: ChipMOS TECHNOLOGIES (BVI) LTD., or formerly known as MODERN MIND TECHNOLOGY LIMITED ChipMOS BVI was incorporated in the British Virgin Islands in January 2002. ChipMOS SEMICONDUCTORS (Shanghai) LTD.
In 2019, we launched SDBG technology to implement multi-chip assembly and module of flash products for NAND Flash applications for SSD and eMMC applications. As of February 29, 2024 we employed 698 employees in our research and development activities.
In 2019, we launched SDBG technology to implement multi-chip assembly and module of flash products for NAND Flash applications for SSD and eMMC applications. As of February 28, 2025 we employed 680 employees in our research and development activities.
Intellectual Property As of February 29, 2024, we held 296 patents in Taiwan,94 patents in the United States, 160 patents in Mainland China, 1 patent in the United Kingdom and 2 patents in Korea and Japan, respectively, relating to various semiconductor assembly and testing technologies. These patents will expire at various dates through to 2042.
Intellectual Property As of February 28, 2025, we held 296 patents in Taiwan, 85 patents in the United States, 160 patents in Mainland China, 1 patent in the United Kingdom and 2 patents in Korea and Japan, respectively, relating to various semiconductor assembly and testing technologies. These patents will expire at various dates through to 2044.
Also, as more and more displays are installed in cars and EV, more driver IC grew for automotive application in 2023. Logic/Mixed-Signal Semiconductor Market The communications market is one of the main drivers of potential growth in the semiconductor industry.
OLED and automotive panel DDIC growth in the second half of 2022. Also, as more and more displays are installed in cars and EV, more driver IC grew for automotive application in 2023 and 2024. Logic/Mixed-Signal Semiconductor Market The communications market is one of the main drivers of potential growth in the semiconductor industry.
These insurance policies cover property damages due to all risks, including but not limited to, fire, lightning and earthquakes. The maximum coverage of property insurance for the Company is approximately NT$128,389 million.
These insurance policies cover property damages due to all risks, including but not limited to, fire, lightning and earthquakes. The maximum coverage of property insurance for the Company is approximately NT$130.51 billion.
Marking Each individual package is marked to provide product identification. 24 Dejunking and Trimming Mold flash is removed from between the lead shoulders through dejunking, and the dambar is cut during the trimming process. Electrical Plating A solderable coating is added to the package leads to prevent oxidization and to keep solder wettability of the package leads.
Dejunking and Trimming Mold flash is removed from between the lead shoulders through dejunking, and the dambar is cut during the trimming process. Electrical Plating A solderable coating is added to the package leads to prevent oxidization and to keep solder wettability of the package leads.
Year ended December 31, 2021 2022 2023 Testing 21.5% 22.3% 20.6% Assembly 29.1% 28.5% 21.7% Display panel driver semiconductor assembly and testing 30.0% 31.0% 36.6% Bumping 19.4% 18.2% 21.1% Total revenue 100.0% 100.0% 100.0% Memory and Logic/Mixed-Signal Semiconductors Testing We provide testing services for memory and logic/mixed-signal semiconductors: Memory.
Year ended December 31, 2022 2023 2024 Testing 22.3% 20.6% 21.9% Assembly 28.5% 21.7% 23.8% Display panel driver semiconductor assembly and testing 31.0% 36.6% 32.2% Bumping 18.2% 21.1% 22.1% Total revenue 100.0% 100.0% 100.0% 22 Memory and Logic/Mixed-Signal Semiconductors Testing We provide testing services for memory and logic/mixed-signal semiconductors: Memory.
As of February 29, 2024, we operated 10 steppers and 19 sputters for gold bumping, 113 inner-lead bonders for assembly and 691 testers for LCD, OLED, automotive 41 panel and other display panel driver semiconductors. We are currently in the process of purchasing additional test equipment.
As of February 28, 2025, we operated 10 steppers and 19 sputters for gold bumping, 109 inner-lead bonders for assembly and 726 testers for LCD, OLED, automotive panel and other display panel driver semiconductors. We are currently in the process of purchasing additional test equipment.
Flip Chip Bonding Using solder bumps or Cu pillar bumps on die, to connect the leadframe or substrate pad via soldering reflow. Molding The die and wires are encapsulated to provide physical support and protection.
Flip Chip Bonding Using solder bumps or Cu pillar bumps on die, to connect the leadframe or substrate pad via soldering reflow. Molding The die and wires are encapsulated to provide physical support and protection. Marking Each individual package is marked to provide product identification.
We may need to enforce our patents or other intellectual property rights or to defend ourselves against claimed infringement of the rights of others through litigation, which could result in substantial costs and a diversion of our resources. See “Item 3.
We expect to continue to file patent applications where appropriate to protect our proprietary technologies. We may need to enforce our patents or other intellectual property rights or to defend ourselves against claimed infringement of the rights of others through litigation, which could result in substantial costs and a diversion of our resources. See “Item 3.
Customers We believe that the following factors have been, and will continue to be, important factors in attracting and retaining customers: • our advanced assembly and testing technologies; • our strong capabilities in testing and assembling DDIC/TDDI and other display panel driver semiconductors; • our focus on high-density memory products and logic/mixed-signal communications products; and • our reputation for high quality and reliable customer-focused services. 32 The number of our customers as of February 28 of 2022, 2023 and February 29, 2024, respectively, was 72, 73 and 67.
Customers We believe that the following factors have been, and will continue to be, important factors in attracting and retaining customers: • our advanced assembly and testing technologies; • our strong capabilities in testing and assembling DDIC/TDDI and other display panel driver semiconductors; • our focus on high-density memory products and logic/mixed-signal communications products; and • our reputation for high quality and reliable customer-focused services.
Cost of raw materials represented 20%, 19% and 19% of our revenue in 2021, 2022 and 2023, respectively. 36 We do not maintain large inventories of leadframes, organic substrates, gold wire or molding compound, but generally maintain sufficient stock of each principal raw material for approximately two to three month’s production based on blanket orders and rolling forecasts of near-term requirements received from customers.
We do not maintain large inventories of leadframes, organic substrates, gold wire or molding compound, but generally maintain sufficient stock of each principal raw material for approximately two to three month’s production based on blanket orders and rolling forecasts of near-term requirements received from customers.
In 2023, 20.6% of our revenue was derived from testing services for memory and logic/mixed-signal semiconductors, 21.7% from assembly services for memory and logic/mixed-signal semiconductors, 36.6% from Display panel driver semiconductor assembly and testing services and 21.1% from bumping services for semiconductors, respectively. In additional, stable long-term demand and high margin are basic characters of automotive application.
In 2024, 21.9% of our revenue was derived from testing services for memory and logic/mixed-signal semiconductors, 23.8% from assembly services for memory and logic/mixed-signal semiconductors, 32.2% from Display panel driver semiconductor assembly and testing services and 22.1% from bumping services for semiconductors, respectively. In additional, stable long-term demand and high margin are basic characters of automotive application.
Fulfillment of public welfare ChipMOS insists to the philosophy of “taking from the society and using it for the society”, by connecting various internal and external resources, the prioritized focus are “cares for the disadvantaged” and “cultivation of young talents” for the public welfare practice, with active collaborations with local communities, schools and social welfare organizations.
It is expected to take practical actions for fighting against climate change and global warming together. 39 Fulfillment of public welfare ChipMOS insists to the philosophy of “taking from the society and using it for the society”, by connecting various internal and external resources, the prioritized focus are “cares for the disadvantaged” and “cultivation of young talents” for the public welfare practice, with active collaborations with local communities, schools and social welfare organizations.
The following diagram presents the basic components of a standard leadframe-based package for memory semiconductors: To address the market for miniaturization of portable electronic products, we are currently developing and will continue to develop increasingly smaller versions of leadframe-based packages to keep pace with continually shrinking semiconductor device sizes.
This design has evolved from a design plugging the leads into holes on the circuit board to a design soldering the leads to the surface of the circuit board. 24 The following diagram presents the basic components of a standard leadframe-based package for memory semiconductors: To address the market for miniaturization of portable electronic products, we are currently developing and will continue to develop increasingly smaller versions of leadframe-based packages to keep pace with continually shrinking semiconductor device sizes.
Raw materials used in the LCD, OLED, automotive panel and other display panel driver semiconductor assembly and testing process include gold, carrier tape, resin, spacer tape, plastic reel, aluminum bags, and inner and outer boxes.
Raw materials used in the LCD, OLED, automotive panel and other display panel driver semiconductor assembly and testing process include gold, carrier tape, resin, spacer tape, plastic reel, aluminum bags, and inner and outer boxes. Cost of raw materials represented 19%, 19% and 20% of our revenue in 2022, 2023 and 2024, respectively.
For the market trend of thinner smartphone, 150um in IC thickness is released for mass production and much thinner IC thickness is in development. The COG assembly process involves the following steps: Chip Probing To screen out the defect chips which fail to meet the device spec. Wafer Lapping/Polish Wafers are ground or with polished to their required thickness.
For the market trend of thinner smartphone, 120um in IC thickness is released for mass production and much thinner IC thickness is in development. The COG assembly process involves the following steps: Chip Probing To screen out the defect chips which fail to meet the device spec.
Auto Optical Inspection Process of wafer inspection is detecting defect to separate chips at pick and place station. Pick and Place Each individual die is picked and placed into a chip tray. Inspection and Packing Each individual die in a tray is visually or auto-inspected for defects.
Die Saw Wafers are cut into individual dies, or chips, in preparation for the pick and place process. Auto Optical Inspection Process of wafer inspection is detecting defect to separate chips at pick and place station. Pick and Place Each individual die is picked and placed into a chip tray.
In WLCSP backend, we take efforts to non-backside coating requirement for customer to cost reduction. Other Services Drop Shipment We offer drop shipment of semiconductors directly to end-users designated by our customers. We provide drop shipment services, including assembly in customer-approved and branded boxes, to a majority of our assembly and testing customers.
Other Services Drop Shipment We offer drop shipment of semiconductors directly to end-users designated by our customers. We provide drop shipment services, including assembly in customer-approved and branded boxes, to a majority of our assembly and testing customers.
In 2023, our top three customers accounted for approximately 25%, 13% and 9% of our revenue, respectively. The majorities of our customers purchase our services through purchase orders and provide us three-month non-binding rolling forecasts on a monthly basis. The price for our services is typically agreed upon at the time when a purchase order is placed.
In 2023, our top three customers accounted for approximately 25%, 13% and 9% of our revenue, respectively. In 2024, our top three customers accounted for approximately 24%, 11% and 11% of our revenue, respectively. The majorities of our customers purchase our services through purchase orders and provide us three-month non-binding rolling forecasts on a monthly basis.
The manufacturing process may be broadly divided into the following stages: Process Description Circuit Design The design of a semiconductor is developed by laying out circuit patterns and interconnections.
Overview of the Semiconductor Manufacturing Process The manufacturing of semiconductors is a complex process that requires increasingly sophisticated engineering and manufacturing expertise. The manufacturing process may be broadly divided into the following stages: 19 Process Description Circuit Design The design of a semiconductor is developed by laying out circuit patterns and interconnections.
Memory Semiconductor Market The potential for memory market growth is linked to anticipated memory content increases in consumer electronics, data center, wireless base-station, PC and smartphone applications due to updated system requirements (such as 5G & wifi 6), increasing use of storage, graphics in gaming and other applications. The memory market is dominated by two segments-DRAM and flash memory.
Ongoing fluctuations in our markets related to these factors potentially affect our results of operations. 18 Memory Semiconductor Market The potential for memory market growth is linked to anticipated memory content increases in consumer electronics, data center, wireless base-station, PC and smartphone applications due to updated system requirements (such as 5G & wifi 6), increasing use of storage, graphics in gaming and other applications.
IATF 16949 certification system seeks to integrate quality management standards into the operation of a company and emphasizes the supervision and measurement of process and performance. An ISO 9001 certification is required by many countries for sales of industrial products.
In addition, our facilities in Hsinchu and Tainan have been recertified with ISO 9001 for substantial revision since 2015. 35 IATF 16949 certification system seeks to integrate quality management standards into the operation of a company and emphasizes the supervision and measurement of process and performance. An ISO 9001 certification is required by many countries for sales of industrial products.
The following table sets forth, for the periods indicated, the percentage breakdown of our revenue, categorized by geographic region based on the jurisdiction in which each customer is headquartered.
The price for our services is typically agreed upon at the time when a purchase order is placed. The following table sets forth, for the periods indicated, the percentage breakdown of our revenue, categorized by geographic region based on the jurisdiction in which each customer is headquartered.
Our Strategy Our goal is to reinforce our position as a leading independent provider of semiconductor assembly and testing services, concentrating principally on memory, logic/mixed-signal and LCD, OLED, automotive panel and other display panel driver semiconductors.
Our Strategy Our goal is to reinforce our position as a leading independent provider of semiconductor assembly and testing services, concentrating principally on memory, logic/mixed-signal and OLED, automotive panel and other display panel driver semiconductors. The principal components of our business strategy are set forth below. Focus on Providing Our Services to Potential Growth Segments of the Semiconductor Industry.
Location of Facility Primary Use Floor Area (m2) Principal Equipment Chupei, Hsinchu Testing/Gold Bumping 38,166 10 steppers 19 sputters 331 testers Hsinchu Industrial Park Testing 25,864 112 testers 27 burn-in ovens Hsinchu Science Park Testing 31,168 188 testers 53 burn-in ovens Southern Taiwan Science Park Assembly/Testing 173,129 948 wire bonders 113 inner-lead bonders 691 testers Equipment Testing of Memory and Logic/Mixed-Signal Semiconductors Test equipment is the most capital-intensive component of the memory and logic/mixed-signal semiconductors test business.
Location of Facility Primary Use Floor Area (m2) Principal Equipment Chupei, Hsinchu Testing/Gold Bumping 40,526 10 steppers 19 sputters 326 testers Hsinchu Industrial Park Testing 25,864 127 testers 18 burn-in ovens Hsinchu Science Park Testing 31,169 193 testers 53 burn-in ovens Southern Taiwan Science Park Assembly/Testing 184,325 790 wire bonders 109 inner-lead bonders 726 testers Equipment Testing of Memory and Logic/Mixed-Signal Semiconductors Test equipment is the most capital-intensive component of the memory and logic/mixed-signal semiconductors test business.
The following chart illustrates our corporate structure and our equity interest in each of our principal subsidiaries as of the date of this Annual Report on Form 20-F. 17 Note: (1) Under IFRS 10, “Consolidated Financial Statements”, we are required to consolidate the financial results of any subsidiaries in which we hold a controlling interest or voting interest in excess of 50% or we have the power to direct or cause the direction of the management and policies, notwithstanding the lack of majority ownership.
Note: (1) Under IFRS 10, “Consolidated Financial Statements”, we are required to consolidate the financial results of any subsidiaries in which we hold a controlling interest or voting interest in excess of 50% or we have the power to direct or cause the direction of the management and policies, notwithstanding the lack of majority ownership.
Agreements with Suzhou Oriza PuHua ZhiXin Equity Investment Partnership (L.P.) On December 21, 2023, the Company’s Board of Directors approved its wholly-owned subsidiary, ChipMOS BVI to sell its entire 45.0242% equity interests in Unimos Shanghai for a total sale price of RMB 979.3 million in cash.
On July 24, 2023, Yangtze Memory sold and transferred all equity interests of Unimos Shanghai to Yangtze Memory Technologies Holding Co., Ltd., (“Yangtze Memory Holding”), which holds 50.94% equity interests of Unimos Shanghai after completed transaction. 17 Agreements with Suzhou Oriza PuHua ZhiXin Equity Investment Partnership (L.P.) On December 21, 2023, the Company’s Board of Directors approved its wholly-owned subsidiary, ChipMOS BVI to sell its entire 45.0242% equity interests in Unimos Shanghai for a total sale price of RMB 979.3 million in cash.
The semiconductor industry supply chain in Taiwan has developed such that the various stages of the semiconductor manufacturing process have been disaggregated, thus allowing for specialization.
The Semiconductor Industry and Conditions of Outsourcing in Taiwan and Mainland China Taiwan is one of the world’s leading locations for outsourced semiconductor manufacturing. The semiconductor industry supply chain in Taiwan has developed such that the various stages of the semiconductor manufacturing process have been disaggregated, thus allowing for specialization.
These are generally considered the most widely used package category. Each package consists of a semiconductor chip encapsulated in a plastic molding compound with metal leads on the perimeter. This design has evolved from a design plugging the leads into holes on the circuit board to a design soldering the leads to the surface of the circuit board.
These are generally considered the most widely used package category. Each package consists of a semiconductor chip encapsulated in a plastic molding compound with metal leads on the perimeter.
For example, we conducted new product introductions and on an on-going basis continue to expand our capabilities in fine-pitch wafer bumping, multi-chip package (“MCP”) and flip chip packaging. We have also introduced low cost metal composite bump (“MCB”) products based on our proprietary Copper plating technology to service display panel market and expand offerings to other business regions.
For example, we conducted new product introductions and on an on-going basis continue to expand our capabilities in fine-pitch wafer bumping, multi-chip package (“MCP”) and flip chip packaging. We are also introducing a low cost silver alloy bump products based on our intellectual property to service display panel market.
The dies are packed within a tray into an aluminum bag after completion of the inspection process. Bumping We also offer bumping services to our customers.
Inspection and Packing Each individual die in a tray is visually or auto-inspected for defects. The dies are packed within a tray into an aluminum bag after completion of the inspection process. Bumping We also offer bumping services to our customers.
The soft demand of TVs impacted our utilization level of COF assembly. Regarding the small panel application, an integrated driver IC solution, TDDI, which became main stream of smart phone panel since 2021. OLED and automotive panel DDIC growth in the second half of 2022.
The end-user demand for LCD, OLED, automotive panel and other display panel driver semiconductors tends to very over time. The soft demand of TVs impacted our utilization level of COF assembly. Regarding the small panel application, an integrated driver IC solution, TDDI, which became main stream of smart phone panel since 2021.
Customer feedback on the test results enables us to adjust the conversion test programs prior to actual testing. We also typically assist our customers in collecting and analyzing the test results and recommends engineering solutions to improve their design and production process.
Once a conversion test program has been developed, we perform correlation and trial tests on the semiconductors. Customer feedback on the test results enables us to adjust the conversion test programs prior to actual testing. We also typically assist our customers in collecting and analyzing the test results and recommend engineering solutions to improve customers’ design and production processes.
Increasingly short product life cycles have amplified time-to-market pressure for semiconductor companies, leading them to rely increasingly on independent companies as a key source for effective wafer fabrication, assembly and testing services.
Increasingly short product life cycles have amplified time-to-market pressure for semiconductor companies, leading them to rely more and more on independent companies as a key source for effective wafer fabrication, assembly and testing services. 20 Semiconductor Assembly and Testing Services Industry Growth in the semiconductor assembly and testing services industry is driven by increased outsourcing of the various stages of the semiconductor manufacturing process by IDMs and fabless semiconductor companies.